Sr. Ic Digital Verification Engineer
https:/www.energyjobline.com/sitemap.xml
, Barcelona,
hace 12 días
... both RTL and Gate-Level Verification.Proficient in Digital Verification Industry Languages (UVM, System Verilog) ... Design Flow: Specification definition, RTL Verification, Synthesis, P&R, Gate-Level Verification, Power Estimation, ATPG Generation and ...
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